1. Field of the Invention
The present invention relates to an analog-to-digital converter, and in particular to a zero-crossing-based analog-to-digital converter having current mismatch correction capability.
2. The Prior Arts
In circuit designs, a negative feedback operation amplifier circuit having high gain, fast response speed, and small and steady current, is often used to realize a pipeline circuit of high resolution, fast sample rate, and low power consumption. However, with the CMOS specification requiring reduction in size, increased elements per unit area of chip, and low operation voltage, it has become increasingly difficult to use an operation amplifier to design a switching capacitor circuit convenient to use, to achieve high gain and large output amplitude slew, while maintaining its stability.
In this respect, a zero-crossing-based pipeline analog-to-digital conversion circuit was proposed in 2007, to replace the operation amplifier required in the conventional design. The basic concept of this design is to use a comparator detecting pseudo short circuit and a constant current supply, to replace the operation amplifier, that utilizes negative feedback to force a pseudo short circuit. The original type of this design is a single end pipeline analog-to-digital conversion circuit, to achieve a sampling rate of 2×108 times per second. Further, in order to reduce noises of voltage supply and the substrate, a zero-crossing-based fully differential pipeline analog-to-digital conversion circuit was proposed in 2009, that can achieve a sampling rate of 5×107 times per second.
However, the mismatch between the Zero Crossing Detector (ZCD) and the current supply could lead to the problem of distortion. The reason for this is that, the intrinsic non-zero time delay existing in the Zero Crossing Detector (ZCD) could cause over-charge, to produce offset error in pipeline circuit stage, that could result in saturation distortion when a multiplying digital-to-analog conversion circuit (MDAC) outputs it remainder.
Therefore, presently, the design and performance of zero-crossing-based analog-to-digital conversion circuit of the prior art is not quite satisfactory, and it has much room for improvements.